為滿足消費者對電子產品高效能、多功能性與及輕薄微小化等功能的需求，現今封裝技術正朝向高功率、高密度、低成本、可快速研發、可高度整合之系統級封裝(System in Package，SiP) 發展。系統級封裝主要係將多個不同功能晶片與被動元件組合於單一封裝結構上，以提昇單一封裝元件之效能。但在系統設計與整合下，封裝結構將更趨於複雜，且將多晶片整合於單一封裝內，此舉將大幅提昇此單一封裝之功率，加上系統級封裝朝小型化發展，勢必會使得此封裝之功率密度急遽增加，造成封裝內部產生局部高溫區以及所謂熱點，而衍生局部高熱應力問題，對晶片及相鄰元件如導線或接點直接造成損壞，或是於製程或是環境測試下受到循環載重而產生疲勞破壞，而影響此封裝元件之可靠度。
本文主要係針對一內含多顆覆晶(flip chip)及被動元件的小型平面式系統級封裝之散熱效能、錫球可靠度及封裝製程應力等進行分析與設計。為達成此一目標，本研究將採用商業有限單元軟體ANSYS® 對此封裝力學行為進行分析，分析模式上將使用三維有限單元模型。在錫球可靠度分析上，將假設此無鉛錫球為一具潛變與塑性特性之材料，以加速熱循環測試作為施載，找出最先破壞的錫球位置，並使用Coffin- Manson公式預測該錫球疲勞壽命。在系統級封裝散熱效能分析上，則考慮自然對流環境下，以晶片功率施載時封裝之熱傳導性質，以晶片熱阻值評估封裝散熱效能。在封裝製程應力分析上，本文將針對此封裝之主要製程步驟進行製程模擬，分析方法將採用三維非線性有限元素分析並搭配網格生死生成技術等。此數值分析模式之正確性將藉由相關力學與熱傳實驗及數據加以驗證，包含數位影像相關法進行翹曲量量測、熱電偶搭配紅外線熱像儀進行溫度量測、熱循環測試錫球可靠度數據以及比對電子顯微鏡進行實驗觀察破壞分析等。
在掌握封裝力學特性後，將進一步藉由參數化有限元素分析探討影響上述三類封裝力學特性的主要因子，以作為改善此封裝力學的基礎，所考慮之設計變數包含元件材料性質、幾何尺寸以及製程參數等等。最後以錫球可靠度為例，利用類神經網路法(artificial neural network，ANN)為本之超模型(metamodeling)最佳化法搭配二次序列規劃(sequential quadratic programming，SQP)進行此系統封裝模組於熱循環載重下錫球可靠度最佳化設計。

摘要 I
目錄 VI
表目錄 X
圖目錄 XI
第一章、導論 1
1.1研究動機 1
1.2文獻回顧 4
1.3研究目標與範圍 9
第二章、內含覆晶結構之系統級封裝 11
2.1系統級封裝結構 11
2.2封裝製程 12
第三章、理論與分析分法 14
3.1可靠度分析 14
3.1.1加速熱循環試驗 14
3.1.2錫銀合金材料組成律 15
3.1.3錫球疲勞壽命預估 15
3.2散熱效能分析 17
3.2.1 熱傳分析邊界條件 17
3.2.2散熱效能評估 18
3.3實驗量測方法 18
3.3.1封裝翹曲量量測 18
3.3.2封裝溫度場量測 20
3.4製程模擬分析 21
3.5等效材料常數計算 22
第四章、三維有限單元分析模型 24
4.1三維有限單元結構/熱傳分析模型 25
4.2二階段全域/局部分析模型 26
第五章、超模型的建構 27
5.1類神經網路 27
5.2倒傳遞類神經網路 28
5.2.1多層感知器網路架構 28
5.2.2誤差倒傳遞演算法 29
5.3倒傳遞類神經網路訓練流程 31
第六章、結果與討論 32
6.1錫球可靠度分析 32
6.1.1數位影像相關法翹曲量驗證 33
6.1.2熱機械行為分析 33
6.1.3 參數化分析 36
6.1.3.1楊氏模數影響 37
6.1.3.2熱膨脹係數影響 37
6.1.3.3幾何厚度影響 38
6.1.3.4 U1晶片位置影響 38
6.2散熱效能分析 39
6.2.1紅外線熱像儀與熱電耦溫度量測實驗 39
6.2.2系統級封裝模組散熱效能分析 41
6.2.3參數化分析 41
6.3製程應力分析 42
6.3.1實驗觀察破壞分析 43
6.3.2參數化分析 44
6.3.2.1楊氏模數影響 44
6.3.2.2熱膨脹係數影響 45
6.3.2.3幾何厚度影響 45
6.4錫球可靠度最佳化設計 46
第七章、結論與展望 50
參考文獻 54
附表 63
附圖 73

Amagai, M. (1999), “Characterization of chip scale packaging materials”, Microelectronics Reliability, Vol. 39, pp. 1365-1377.

Bar-Cohen, A., Kraus, A. D. and Davidson, S. F. (1983), “Thermal Frontiers in the Design and Packaging of Microelectronic Equipment”, Mechanical Engineering, Vol. 105, pp. 53-59.

Blattau, N. and Hillman, C. (2005), “A comparison of isothermal fatigue behavior of Sn-Ag-Cu to Sn-Pb solder”, in Proc. SMTA Int. Annu. Conference, pp.884-889.

Bai, N. and Chen, X. (2008), “A New Unified Constitutive Model With Short- and Long-Rangeback Stress For Lead-Free Solders of Sn-3Ag- 0.5Cu and Sn-0.7Cu”, International Journal of Plasticity, Vol. 25, pp. 2181-2203.

Chen, W. H., Chen, H. C. and Shen, H. A. (2003), “An Effective Methodology for Thermal Characterization of Electronic Packaging”, IEEE Transaction on Components and Packaging Technologies, Vol. 26, pp. 222-232.

Chen, W. H., Cheng, H.C. and Lin, C.H. (2004), “On the Thermal Performance Characteristics of Three-dimensional Multichip Modules”, ASME Transactions, Journal of Electronic Packaging, Vol. 126, pp. 374-383.

Chen, S., Tsai C. Z., Kao, N. and Wu, E. (2005), “Mechanical Behavior of Flip Chip Packages Under Thermal Loading”, Micro - and Opto- Electronic Materials and Structures: Physics, Mechanics, Design, Reliability, Packaging. Vol. 4, pp. 651-676.

Chen, W. H., Lin, S. R. and Chiang, K. N. (2006) , “Predicting the Liquid Formation for the Solder Joint in Flip Chip Technology”, Journal of Electronic Packagin, Vol. 128, pp.331-338

Chaillot, A., Massior, G., Munier C., Lombaert-Valot, I., Bosquet, S., Chastannet, C., Plouseau, D., Munier, E., Maron, D., Raynal, P ;Villard, S. and Dumonteil, R. (2007), “Finite Element Modeling(FEM) of Green Electronics in Aeronautical and Military Communication Systems (GEAMCOS)”, Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems International conference, EuroSime, pp. 1-8.

Chang, C. H. (2007), “Optimal design of fatigue life for quad flat no lead package by using taguchi method”, Master Thesis of National Cheng Kung University, Taiwan, R.O.C.

Cheng, H.C., Chiang, K.N. and Lee, M. H. (1998), “An Effective Approach for Three-Dimensional Finite Element Analysis of Ball Grid Array Typed Packages”, Journal of Electronic Packaging, Vol.120, pp.129-134.

Cheng, H.C., Chiang, K.N., Chen, C. K., and Lin, J.C. (2001), “Solder Joint Reliability of Thermal Enhanced BGA Using a Finite-Volume- Weighted Averaging Technique”, Journal of the Chinese Institute of Engineers, Vol.24, pp.439-451

Cheng, H. C., Chen, W. H., and Chung, I. C. (2004), “Integration of Simulation and Response Surface Method for Thermal Design of Multichip Modulus”, IEEE Transaction on Components and Packaging Technologies, Vol. 27, pp. 359-372.

Cheng, H. C., Yu, C. Y. and Chen, W. H. (2005), “An Effective Thermal-Mechanical Modeling Methodology for Large-Scale Area Array Typed Packages”, Computer Modeling in Engineering and Sciences, Vol. 7, pp. 1-17.

Cheng, H. C., Ho, C. L., Chen W. C. and Yang, S. S. (2006), “A Study of Process-induced Deformations of Anisotropic Conductive Film (ACF) Assembly,” IEEE Transactions on Components and Packaging Technologies, Vol. 29, pp.577-588

Cheng, H. C., Huang, Y. C. and Chen, W. H. (2007), “A Force-Directed Based Optimization Scheme for Thermal Placement Design of MCMs”, IEEE Transactions on Advanced Packaging, Vol. 30, pp. 56-67.

Cheng, H.C, Chen, W. H. and Cheng, H. F. (2008) , “Theoretical and experimental characterization of heat dissipation in a board-level microelectronic component”, Applied Thermal Engineering, Vol. 28, pp. 575-588.

Cheng, H. C., Chung, I. C.and Chen, W. H. (2009a), “Response Surface based Thermal Optimization Approach for Chip Placement Design of Multiple-Chip Modules”, IEEE Transactions on Components and Packaging Technologies, Vol. 32, pp. 531-541.

Cheng, H. C., Chen, W. H., Lin, C. S., Hsu, Y. Y. and Uang, R. H.(2009b), “On the Thermal-mechanical Behaviors of a Novel Nanowire-based Anisotropic Conductive Film Technology”, IEEE Transactions on Advanced Packaging, Vol. 32, pp.546-563.

Chiang, K. N., Cheng, H. C., and Chen, W. H. (1999) , “Large-Scaled 3-D Area Array Electronic Packaging Analysis”, Journal of Computer Modeling and Simulation in Engineering, Vol. 4, pp.4-11.

Chiang, K.N. Chang C. W. and Lin, J. D. (2001), “Process Modeling and Thermal/Mechanical Behavior of ACA/ACF type Flip-Chip Packages”, Journal of Electronic Packaging, Vol. 123, pp.331-337

Chiang, S. Y., Chou, C. Y., Yew, m. c. and Chiang, K. N. (2007), “Reliability Analysis of Copper Interconnection in System in Package Structure”, Electronic Material and Packaging International Conference, Daejeon, pp19-22.

Coffin, L. F. (1954) , “A study of the effects of cyclic thermal stresses on a ductile metal”, ASME transactions, Vol.76, pp. 931-950

Corbin, J.S.(1993), “Finite Element Analysis for Solder Ball Connect (SBC) Structural Design Optimization”, IBM Journal of Research and Development, Vol.37, pp.585-596.


Cuddalorepatta, G. and Dasgupta, A. (2008), “Effect of Primary Creep Behavior on Fatigue Damage Accumulation rate in accelerated thermal cycling of Sn3.0Ag0.5Cu Pb-Free Interconnects”, Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro-system IEEE Conference, EuroSime, pp. 1-8.

Darveaux, R., Banerji, K., Mawer, A. and Dody, G.(1994), “Reliability of Plastic Ball Grid Array Assembly”, in Ball Grid Array Technology, J.H. Lau, ed., McGraw- Hill, New York, pp. 379-439.

Engelmaier, W. (1983), “Fatigue Life of Leadless Chip Carrier Solder Joints During Power Cycling”, IEEE Transaction on Components, Hybrids, and Manufacturing Technology, Vol.6, pp. 232-237.

Engelmaier, W. and Attarwala, I.(1989), “Surface-mount attachment reliability of dip-leaded ceramic chip carriers on FR-4 circuit boards”, IEEE tansactions on component, hybrids and manufacturing technology, Vol.12, pp.284-296.

Ellison, G. N. (1989), “Thermal computations for electronic equipment”, R. E. Krieger Publishing Company, Malabar ,FL.

EIA/JEDEC Standard. (1995), “Inetegrate Circuits Thermal Test Method Environment Conditions-Natural Convection (Still Air)”, EIA/JESD51-2.

Ghaffarian, R. and Kim, N. P. (1998), ” Reliability and Failure Analyses of Thermally Cycled Ball Grid Array Assemblies”, IEEE Electronic Components and Technology Conference, Seattle, WA , pp.713-720.

Guo, Y. and Vijaykumar, B. (2006), “Issues and Solution for Thermal Management in Platic Packages”, Electronic Packaging Technology International Conference, pp.1-5.

Juang, Y. C. (2009), “On the Study of Process Induced Thermal- Mechanical Analysis and Reliability for a Flip-Chip Ball Grid Array Packaging”, Master Thesis of National Tsing Hua University, Taiwan, R.O.C.

Lau, J. H. and Chen, K. L. (1997), “Thermal and Mechanical Evaluations of a Cost-Effective Plastic Ball Grid Array Package”, Journal of Electronic Packaging, Vol. 119, pp. 208-212.

Lin, X. W. and Pramanik, D. (1998), “Future Interconnect Technologies and Copper Metallization,” Solid State Technology, Vol. 41, p63-79.

Lin, J. C., Cheng, H. C. and Chiang, K.N. (2005), “Design and Analysis of Wafer-Level CSP with a Double-Pad-
Structure,” IEEE Transactions on Components and Packaging Technologies, Vol. 28, pp. 117-126.

Manson, S. S. (1966), “Thermal Stress and Low Cycle Fatigue”, McGraw- Hill, Inc.

Pan, T. Y. (1991), “Thermal Cycling Induced Plastic Deformation in Solder Joints –Part I: Accumulated Deformation in Surface Mount Joints”, ASME Journal of Electronic Packaging, Vol.113, pp. 8-15.

Popelar, S. F. (1997), “A Parametric Study of Flip Chip Reliability Base on Solder Fatigue”, International Electronics Manufacturing Techology Symposium Twenty-First IEEE/CPMT International, Austin, Texas, pp.299-307

Pang, J. H. L., Seetoh, C. W. and Wang, Z. P. (2000), “CBGA Solder Joint Reliability Evaluation Based on Elastic-Plastic-Creep Analysis”, Journal of Electronic Packaging, Vol. 122, pp. 255-261.

Pang, J. H. L., Cheng, D. Y. R. and Low, T. H. (2001), “Thermal Cycling Analysis of Flip-Chip Solder Joint Reliability”, IEEE Transactions on Components and Packaging Technologies, Vol. 24, pp. 705-712.

Peng, C. T., Cheng, H. C. and Chiang, K. N. (2004), “Reliability Analysis and Design for the Fine-pitch Flip Chip BGA Packaging”, IEEE Transactions on Components and Packaging Technologies, Vol. 27, pp. 684-693.

Risdsdale, G., Joiner, B., Bigler, J. and Torres, V. M. (1996), “Thermal Simulation to Analyze Design Features of Plastic Quad Flat Package”, Journal of Microcircuits and Electronic Package, Vol. 19, pp. 103-109.

Rector, L. P., Gong, S. and Miles, T. R. (2000), “Transfer Molding Encapsultaion of Flip Chip Array Packages”, The International Journal of Microcircuits and Electronic Packaging, Vol.23, pp.400-406.

Schapery, R. A. (1968), “Thermal Expansion Coefficients of Composite Material Based on Energy Principles”, Journal of Composite Material, Vol. 2, pp. 380-404.

Snyder, D.W. (1992), “Thermal analysis and modeling of a copper-ployimide thin-film-on silicon multichip module packaging technology”, Semiconductor Thermal Measurement and Management Symposium, Austin, TX, pp.101-109.


Strusevich, N., Stoyanov, S., Liu, D., Bailey, C. , Richardson, A. Dumas, N. and Yannou, J. M. (2006), “Modelling the Behavior of Solder Joints for Wafer Level of Solder”, Electronics Packaging Technology Conference, Singapore, pp.127-132.

Shen, H. T. (2007), “Investigation of Mechanical Properties and Deformation of Artificial Mesh in Live Rabbits “, Master thesis of National Tsing Hua University, Taiwan, R.O.C.

Tai, K. L. (2000) , “System-In-Package (SIP): Challenges and Oppor- tunities”, Proceedings of the 2000 Asia and South Pacific Design Automation Conference, Yokohama. Japan, pp.191-196.

Tee, T. Y., Ng, H. S, Yap, D. and Zhong, Z. (2003), “Comprehensive Board-Level Solder Joint Reliability Modeling and Testing of QFN and PowerQFN Packages”, Microelectronics Reliability, Vol.43, pp. 1329-1338.

Wang, K. H. (2008), “Temperature Measurement and Heat Transfer Analysis for LED Package” Master Thesis of National Tsing Hua University, Taiwan, R.O.C.

Yeh, S. H. (2007), “Thermal Mechanical Analysis of Metal/Dielectric Pad Structure in DRAM Chip,” Master thesis of National Tsing Hua University, Taiwan, R.O.C.